That’s where Eliyan comes in. NuLink™, the Eliyan interconnect solution, delivers performance and power/area efficiency that no other technology can offer. Our exclusive trade secrets and patent-protected technologies deliver a UCIe compliant interconnect at twice the bandwidth and half the power.
How is this possible? Because we have been at this for years, long before the industry standards were established. Inventing NuLink technology, incrementally improving it over the years, and taking it to volume production, have enabled us to achieve unprecedented characteristics.
Eliyan’s 40Gbps/bump chiplet interconnect silicon demonstrates the capability to achieve beachfront bandwidths up to 3Tbps/mm on standard organic substrate at unprecedented power, area, and latency, eliminating the need for complex Silicon Interposers in most applications.
Eliyan Corporation, credited for the invention of the semiconductor industry’s highest-performance and most efficient chiplet interconnect, today announced silicon availability for its breakthrough NuLink™ PHY technology.
Ramin Farjadrad is the inventor of over 130 granted and pending patents in communications and networking. He has a successful track record of creating differentiating connectivity technologies adopted by the industry as International standards (Two Ethernet standards at IEEE, one chiplet connectivity at OCP.) Ramin co-founded Velio Communications, which led to a Rambus/LSI Logic acquisition, and Aquantia, which IPO’d and was acquired by Marvell Technologies. Ramin’s Ph.D. EE is from Stanford.
Patrick Soheili has been CEO of three early-stage technology companies. He led BD/CD and IPBU at eSilicon, as well as heading marketing, sales, and operations management at Altera, AMD, and TRW. He’s led seed-stage deep technology venture capital resulting in multiple IPOs and M&As. Patrick’s MBA is from Purdue; his Math and Physics BS is from UCSB and the University of Bristol.
Syrus Ziai held VP of engineering roles at Nuvia, Ikanos, Qualcomm, and PsiQuantum. He has a breadth of experience in systems, chip architecture, design methodologies, and packaging, and has managed 100+ engineering teams across the semiconductor industry.
Syrus’s MS EE is from Stanford. He has 30 years of experience and has developed 11 patents.