Eliyan’s PHY technology, NuLink™, enables the creation of super large SiPs on Standard Packaging, thus improving AI performance 10X by eliminating The Memory Wall
"Eliyan’s chiplet interconnect technology will make multi-die approaches more attractive to chip suppliers whose designs must optimize on power and bandwidth vectors."
John Lorenz, Senior Analyst
at Yole Intelligence
"When I first heard from Ramin and team what they're working on ... achieving those numbers is magical. I can't wait for [Eliyan IP] to be put into some interesting projects my team is involved in."
Raja Koduri, CEO
at Mihira Al
Upcoming Event
2024 OCP Global Summit
Eliyan will be presenting and participating in the following on Oct 17th
9:45am BoW 2.1 PHY (introducing BoW PHY spec changes to support Memory)
10:40am Electrical Interfaces Performance Metrics (technical talk on how-to-measure parameters)
1:30pm Impact of Chiplets – Heterogeneous Integration and Modularity on HPC and AI Systems (panel)
2:45pm Innovative Architectures to Break the Memory and IO Walls (solo presentation)