The Ultimate Chiplet Interconnect
Eliyan’s NuLink™ PHY technology is optimized for high-speed serial die-to-die connections supporting industry standard (BoW and UCIe) and to proprietary, simultaneous bidirectional (SBD) interconnect solutions.
NuLink PHY delivers outstanding performance at low power in advanced packaging and standard packaging using a wide range of bump pitches from 40-130 microns, enabling improvements in power efficiency and PHY area. And NuLink has been extended to support high-speed chip-to-chip connections with the new NuLink-X PHY technology.
NuLink’s Evolution
A Breakthrough Interconnect
NuLink evolved from a 2016 architectural breakthrough in PHY technology. Recognized PHY expert (and Eliyan founder) Ramin Farjadrad recognized that the very different electrical environment between dies in multi-die packages should be reflected in the architecture of the PHY IP that drove the connections.
The result was a huge step forward in performance, power efficiency, and area. This breakthrough received strong support from the Open Compute Project (OCP) and was adopted as an industry standard for chiplet interconnect Bunch of Wires (BoW).
Eliyan went beyond the BoW work to further improve and add functionality to the PHY. The result is NuLink. As a protocol-agnostic building block, the NuLink PHY fully supports BoW, industry standard Universal Chiplet Interface Express (UCIe), and a wide range of other die-to-die interconnect structures. And it supports them on both silicon and package substrates at higher performance and lower power than all existing BoW and UCIe standard PHYs.
Benefits
NuLink removes the key bottlenecks in Generative AI systems/chiplets by:
Highest Performance & Lowest Power
Breaking the Memory Wall
Increasing the number of HBMs by 4x in a package, accommodating larger LLMs models on standard or advanced packaging, leveraging the up-to-2x bandwidth of NuLink.
Lower Costs for Packaging, Assembly & Testing
NuLink-SP (NuLink on Standard Packaging) substantially reduces packaging, test, and assembly costs by at least 2x.
Maximize Memory Capacity & Bandwidth per XPU
NuLink for Die-to-Die Connections
Unlike fixed unidirectional interconnect solutions, NuLink technology delivers low-power and high-performance die-to-memory (D2M) solutions.
Simply put, NuLink’s advantages over alternative PHY IP are performance, power efficiency, area, and flexibility. In standard packaging, NuLink provides the same bandwidth and power efficiency that others can only achieve in advanced packaging. In advanced packaging, NuLink offers unparalleled performance. And, unique to NuLink technology is the ability to do simultaneous bidirectional (SBD) signaling.
System architects choose NuLink for die-to-die connections for the following interconnect performance improvements:
- NuLink-AP achieves the absolute maximum performance from chiplet-based systems on silicon substrates such as interposers or embedded bridges.
- NuLink-SP enables a system on a standard organic package substrate—saving cost and ensuring continuity of supply—while achieving similar bandwidth, power, and latency to a silicon-substrate implementation.
- Standard package substrates are far larger and are able to integrate a higher number of supporting dies, such as high-bandwidth memory (HBM) and Silicon Photonics chiplets, with ASIC main dies on one substrate.
- Limited maximum area for silicon substrates, limiting the level of integration.
- High cost and complexity, forcing high end-system TCO.
- Delicate mechanical structures, limiting access to markets such as automotive with mission-critical requirements and system level reliability.
- Long manufacturing cycle time of 3-6 months, creating forecasting and supply chain management issues.
- Limited, vendor-specific supply chains, risking continuity of supply.
NuLink shines in die-to-memory (D2M) applications. NuLink technology natively utilizes bidirectional transceivers for every data lane. In complying with unidirectional standards such as UCIe or BoW, we configure the lanes as unidirectional transmit or receive lanes.
In contrast, memory connections utilize half-duplex bidirectional data lanes which dynamically switch between Read or Write operation, either transmitting or receiving data at any given time.
NuLink’s bidirectional transceivers support this dynamic bidirectional capability with fast switching time. This doubles beachfront bandwidth for memory traffic. As a result, NuLink delivers the bandwidth requirements for HBM on standard organic packaging with 90um and above bump pitch. NuLink’s inherent dynamic bidirectional capability is incorporated in die-to-memory interface proposals such as SPHBM (HBM-ASIC connectivity over standard package) and UMI (Universal Memory Interface).
Eliyan’s NuLink die-to-die links are used to define a Universal Memory Interface (UMI). An ASIC with a UMI connection could hit different performance points using different memory chiplets. The figure below shows the concept with a single ASIC design connected to DDR, GDDR, and HBM DRAMs.
- Maximizing the ASIC beachfront bandwidth.
- Improving end-system SKU management by enabling different systems with the same ASIC.
- Saving power & ASIC area by replacing DRAM PHYs and controllers with more efficient NuLink PHYs and UMI controllers.
- Enabling vendors to offer memory PHYs as silicon-proven chiplets (instead of IPs in every new node.)
In addition, the UMI concept can make connections to non-memory dies such as co-packaged optics (CPO) and SerDes chiplets.
NuLink for Simultaneous Bidirectional (SBD) Connections
Unlike other die-to-die solutions today, NuLink technology is capable of simultaneous bidirectional (SBD) signaling, which means sending data on wires in both directions at the same time. Eliyan’s patented technologies and technical know-how enable D2D designs that can receive data while simultaneously transmitting data on the same wire. Using SBD signaling instantly doubles the bandwidth per interface, enabling the highest possible performance for D2D connections, especially important for applications such as AI training and inference for large language models (LLMs).
Simultaneous Bidirectional (SBD) – A Proven Track Record of Success
Eliyan’s founding team has a long history of developing and productizing SBD technology, including its use in SerDes for IEEE 802.3bz (5GBase-T) and Automotive Ethernet (10G-BaseT1), and the use of SBD for D2D on 14nm ASICs in volume production with a large OEM customer.
Industry Standards
Eliyan is a member and supporter of multiple industry standard organizations, including:
NuLink-X for Chip-to-Chip (C2C) Connections
Eliyan developed its NuLink-X technology to deliver low-power and high-performance chip-to-chip (C2C) interconnect solutions. Our NuLink-X chip-to-chip (C2C) PHY solutions enable longer-reach C2C (vs. D2D) connections between two packaged devices on the same PCB with much lower power than 112G/224G SerDes solutions.
Example applications include ASIC connections to
- Optical modules on the same PCB.
- SerDes chiplets on the same PCB for off-board connections.
- Memory expansion on the same PCB, such as HBM modules.
Benefits Include
- High-bandwidth connections between packaged chips within a PCB.
- Over 5x lower power than 112G/224G SerDes alternately used for such applications.
- Scale-up traffic with electrical or optical connections at edge of PCB.
