Eliyan recently taped out its NuLink die-to-die PHY IP on TSMC N3, achieving 64 Gbps per bump using standard packaging, Eliyan CEO Ramin Farjadrad told EE Times. This is equivalent to 4.55 Tbps per millimeter of bandwidth at less than half a picojoule per bit.
The chiplet design movement representing multi-billion-dollar market potential is marching ahead with key building blocks falling in place while being taped out at advanced process nodes like TSMC’s 3 nm.
